Implementation of Circuit Optimization Technique for Digital CMOS Comparator Using Parallel Prefix Tree Architecture

Iosr Journals;P. Ranjith1, P. Shankar Bharathi

Description

No description available.

Citations (0)

Mentions (0)

Metrics

Dataset Index

0.5

FAIR Score

85%

Citations

0

Mentions

0

Metrics Over Time

Publication Details

DOI

Publisher

Figshare

License

CC-BY

Assigned Domain

Subfield

Hardware and Architecture

Field

Computer Science

Domain

Physical Sciences

Confidence Score

96%

Source

Open Alex

Normalization Factors

FT

57.69

CTw

1.00

MTw

1.00