A Novel SOI-LDMOSFET With Superior Electrical Performances

In current study, a new silicon-on-insulator (SOI) lateral-double-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) is offered. Altering charge distribution causes less electric field crowding and enhanced breakdown voltage (VBR). For amending charge distribution, a metal region (COLUMN) and an air layer in the transistor are used. On the other the floating-body influence and impact ionization produce additional holes that are intensified via the parasitic bipolar junction transistor (BJT) in SOI-LDMOSFET that weaken the transistor efficiency. For that matter, a silicon layer under the BOX, attached to the channel area through the COLUMN has been replaced for reducing the hole density in the channel and control the BJT impact considerably. In order to attain the optimal outcomes, the COLUMN and the silicon layer under the BOX location and sizes are optimized carefully. DC and radio frequency features corresponding to the offered structure are examined through 2-D numerical simulation and compared with conventional SOI-LDMOSFET (C-SOI-LDMOSFET) features. The VBR corresponding to the offered structure develops by 229% comparing with that of the C-SOI-LDMOSFET structure. Though drain current of the suggested structure decreases slightly, 220% development in utmost output power density for the device is attained because of great enhancement of the VBR. Furthermore, the suggested structure causes the development of utmost oscillation frequency, utmost existing gain, and selfheating impacts corresponding to the device. Consequently, the suggested structure has excellent electrical performances comparing with the analogous device according to the conventional structure.